SR Flip flop


The clocked SR Flip Flop consist of the basic NAND latch and two other NAND gates to provide clock pulse. In this video we will describe the Clocked SR flip-flops or SR latch.

After watching this video you will be able to:-

1. Describe what is clocked SR flip-flop.

2. Draw and explain the circuit diagram of SR flip-flop.

3. Construct SR flip-flop using two NAND gates or two NOR Gates.

4. Write the truth table of SR flipflop.


I can live without food but I can't live without teaching. I passionate about my profession. Raj Kumar Thenua, M.Tech in Digital Communication, GATE 2015 & NET 2014 Qualified, currently working as an Assistant Professor at Anand Engineering College, Agra. He has an experience of approx 10 years in academics. The areas of interest are Communication, Signal Processing, and Adaptive filters. He has received a “Shrestha Shikshak Puruskar” by Sharda Group of Institutions (SGI) in the year 2009-10 for outstanding academic performance He has the knowledge of various Engineering simulation software’s mainly MATLAB, Simulink, IE3D, Scilab, Code composer Studio. He is the active member of IETE, ISTE, IAENG, IACSIT, UACEE.


Please enter your comment!
Please enter your name here

This site uses Akismet to reduce spam. Learn how your comment data is processed.